(1) Practical guide-memristor

 General electrical measurementes

A memristor is a resistive switching device that changes its internal resistance state according to the history of the applied voltage and current. It can be described by a set of equations:

(1) V= R (W, I) I

(2) dW/dt= f (W, T, V, t)

Here V, I and R are the voltage, current and resistance, respectively. W is an internal state variable, described by a time-varying function f, and it is crucial to the switching dynamics of the memristor. In addition, temperature is second order state variable. T exhibits Ca2+-like internal dynamics, and biorealistic emulation of synaptic functions may be achieved naturally where temperature offers an internal timing process like neural plasticity.

Filamentary resistive switching (let's call it 1D-RS) are widely reported for defect-rich high-k dielectrics such as TaOx or HfOx. 1D-RS may show a large on/off ratio depending on the current limiting action during the set process (e.g. using compliance of semiconductor analyzer or controlled by an external load resistor). On the other hand, area-dependent resistive switching (2D-RS) or bulk resistive switching (3D-RS) show a self-limiting, a gradual set and the resistance states change homogeneously. Among different materials amorphous oxide semiconductor (AOS) is an ideal choice since the amount of charge carriers can be modulated under a well-defined voltage range, thus result in a uniform resistance gradient.

2D and 3D resistive switching have a great advantage because the device reliability is independent on the reproducibility of the microstructural filament formation. I note that mostly the I-V curve of the 1D-RS shows abrupt current change (let's call it digital RS), and both 2D and 3D resistive switching may result in variable hysteretic I-V loops either quasi-abrupt or triangle-like switching. Now the question is how we differentiate the resistive switching mechanism by measurement. It can be clearly concluded by two experimental findings:

1.  If the current level is linearly scaling with the device area means the 1D-RS is excluded.

2. If a wide variety of hysteretic shapes of the I-V curves is observed by changing both the voltage-sweep rate and thickness means the mechanism is through the bulk material, 3D-RS.

3. However, when the change of thickness does not affect the I-V curves and if the electrode polarities have a great impact on how the RS occurs, it is an interface-type of resistive switching or 2D-RS.

Electrical measurement protocol:

A. Pristine state (as-fabricated device)

1D-RS usually requires an electroforming process to create the template of the conductive filament (CF). This process can be done by a voltage sweep under a certain compliance current (the lowest current level possible to obtain the pinched hysteresis). Also, you may obtain the CF by a current sweep and manual stop when the voltage drop has stabilized (see the previous tutorials on this website).

The 2D and 3D resistive switching are self-limiting but may still need let's call an initialization step. Why different name? because this step is not as complex as electroforming and usually an operator needs to do one-cycle-test to a certain resistance state (defined by voltage range).

B. Resistive switching tests

1. DC sweep @ different ramp speeds and @ different voltage ranges. These two tests should be integrated.

If there are different thickness or area. The test should be performed for all of devices. By evaluating of these results, already the resistive switching mechanism will be clear.

2. Endurance test can be done by applying 100 consecutive I-V cycles and cumulative distribution of different resistance states+ SET and RESET voltage distribution can be obtained. This test can also be performed using fast pulsed I-V method .The latter test may result in higher cycle of endurance.

3. Next step is to know how long @ a very small voltage such as 0.1 V, the resistance state is unchanged. This test can be done @ RT or 85°C (in case of evaluating non-volatility of the memory device). Speed and timing of the current transient should be fairly optimized for accurate sampling data. (See keithley 4200 SCS)

Next tutorial will be on MLC approach and Analogue memristor device.